1. Field of the Invention
The invention relates in general to a method for driving a plasma display panel (PDP) and structure thereof, and in particular, to a method for driving a PDP having a priming electrode and structure thereof
2. Description of the Related Art
As the fabrication technology of the audio/video (A/V) devices is developing rapidly, higher quality audio and video services are foreseen popular among the users. Take the display device for example. The conventional cathode ray tube (CRT) display cannot provide better audio and video quality than movies, as well as having the disadvantages of large volume, serious radiation issue, and serious image contortion and distortion at the brim region of the screen. The conventional CRT display device certainly cannot satisfy the demands for higher quality audio and video services When the high definition digital television (HDTV) begins to broadcast and the compliant products become more affordable, the CRT displays will be phased out. The plasma display panel (PDP) display, with the advantages of low radiation, low power consumption, and large display area with small volume, will be a very promising HDTV display to replace the CRT display.
FIG. 1 shows a three-dimensional diagram of a plasma display panel (PDP) according to a conventional method. The PDP includes a front substrate 102, a rear substrate 108. A plurality of sustaining electrodes X and scanning electrode Y are arranged alternately and in parallel on the front substrate 102. The sustaining electrode X and the scanning electrode Y are covered with a dielectric layer 104. The dielectric layer is covered with a protective layer 106, which is made of magnesium oxide (MgO), such that the sustaining electrode X and the scanning electrode Y can be protected.
A plurality of address electrodes A are formed on the rear substrate 108, and are orthogonal to the sustaining electrodes X and the scanning electrodes Y respectively. The address electrodes A are covered with a dielectric layer 116. A plurality of ribs 112 are formed on the dielectric layer 116 and are parallel to the address electrodes A. A fluorescence layer 110 is formed between the adjacent ribs 112 and on the sidewall of the ribs 112.
FIG. 2 illustrates the cross-sectional view of a PDP according to a conventional method. All elements of FIG. 1 are shown in FIG. 2 with the same numerical number, except the ribs 112. One sustaining electrode X and one scanning electrode Y composes a pair of driving electrodes on the front substrate 102. One pair of driving electrodes and the corresponding address electrode A on the rear substrate 108 defines a pixel unit 200. The plurality of the sustaining electrodes X, the scanning electrodes Y, and the address electrodes A commonly defines a plurality of pixel units 200, disposed in the form of a rectangle matrix. The area between the pixel units 200 is defined as a dark area 203, as shown in FIG. 2.
A black matrix 212 on the front substrate 102 is positioned between each pair of driving electrodes, and is also in the dark area 203. The black matrix 212 is opaque and is used for blocking the light from the exterior environment so as to increase the contrast of the PDP. The space between the front substrate 102 and the rear substrate 108 is called a discharge space 214 and is filled with the discharge gas mixed with Ne and Xe.
Each pixel unit 200 can be regarded as a capacitive load. The driving circuit provides the alternating current of high frequency for charging each pixel unit 200 through the corresponding sustain electrode X and scan electrode Y The gas in the discharge space 214 is excited, discharged, and then emit UV light. The fluorescence layer 110 absorbs the UV light of specified wavelengths and then emits visible lights.
FIGS. 3A and 3B illustrate the driving sequence for driving a pixel unit in the form of timing chart according to a conventional method. The driving sequence usually includes a reset period T1, an address period T2, and a sustain period T3. In the reset period T1, each pixel unit is reset by respectively applying erase pulses to the corresponding sustain electrode X and the scan electrode Y so that the accumulation of the wall charges for each pixel unit is set to the same. Then, the discharge gas in all pixel units 200 are excited to be discharge ion, and the status of the discharge ions in each pixel unit 200 is reset to the same.
In the address period T2, the image data signals are applied to the pixel units, which are selected to emit lights. In the sustain period T3, light pulses are produced by applying alternating voltages across the sustain electrode X and the scan electrode Y of the selected pixel units by the help of the memory effect of the wall charges.
The reset period T1 further includes three periods: a first reset period T11, a second reset period T12, and a third reset period T13. During the first reset period T11, a first erase pulse PY1 of about 100 μs duration is applied to all the scan electrodes Y so as to remove the wall charges remaining after the last sustain period. During the second reset period T12, a priming pulse PX2 is applied to all the sustain electrodes X so as to produce wall charges on the pixel units again and so as to reset the status of the wall charges to be the same. Since the priming pulse PX2 provides an instant high voltage across the sustain electrode X and scan electrodes Y, the discharge gas in the discharging space 214 is excited, and becomes the wall charges in each pixel unit. During the third reset period T13, a second erase pulse PY3 of about 100 μs duration is applied to the all scan electrodes Y to remove the redundant wall charges in each pixel unit. Another pulse can be applied to the sustain electrode X in order to remove the wall charges remaining after the last sustain period and the discharge ion remaining in this driving sequence respectively during the first reset period T11 and the third reset period T13.
During the second reset period T12, there are two ways to provide a priming pulse PX2. The first one is to provide a priming pulse PX2 of high level voltage and of positive polarity to the sustaining electrode X as shown in FIG. 3A. The second one is to provide a priming pulse PX2 of positive polarity to the sustaining electrode X and to provide a priming pulse PY2 of negative polarity to the scanning electrode Y, as shown in FIG. 3B. When the priming pulse PX2 or the voltage difference between the priming pulse PX2 and the priming pulse PY2 becomes larger, the discharge ion in the discharging space 214 is produced by more quantity and the status consistence of the discharge ion for each pixel unit 200 becomes higher.
However, the discharge ion induces the fluorescence layer 110 emitting visible light, which is called as the background glow. The background glow during the reset period T1 will decrease the contrast ratio of the PDP, and lower the quality of the PDP.